MC908GR8CDWE Datasheet, PDF (185/408 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Freescale Semiconductor, Inc.
Low-Voltage Inhibit (LVI)
Functional Description
LVISTOP, LVIPWRD, LVI5OR3, and LVIRSTD are in the configuration
register (MOR1). See Configuration Register (CONFIG) for details of the
LVI’s configuration bits. Once an LVI reset occurs, the MCU remains in
reset until V_DD rises above a voltage, V_TRIPR, which causes the MCU to
exit reset. See Low-Voltage Inhibit (LVI) Reset for details of the
interaction between the SIM and the LVI. The output of the comparator
controls the state of the LVIOUT flag in the LVI status register (LVISR).
An LVI reset also drives the RST pin low to provide low-voltage
protection to external peripheral devices.
V_DD
LVIPWRD
FROM CONFIG
STOP INSTRUCTION
FROM CONFIG
LVIRSTD
LVISTOP
FROM CONFIG
LOW V_DD
DETECTOR
V_DD > LVI_Trip = 0
V_DD ≤ LVI_Trip = 1
LVI5OR3
FROM CONFIG
LVIOUT
LVI RESET
Figure 14-1. LVI Module Block Diagram
MC68HC908GR8 — Rev 4.0
MOTOROLA
Low-Voltage Inhibit (LVI)
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Technical Data
185