MC908GR8CDWE Datasheet, PDF (340/408 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Freescale Semiconductor, Inc.
Timer Interface Module (TIM)
Addr. Register Name
Read:
$002D
Timer 2 Counter Register
Low (T2CNTL)
Write:
Reset:
Read:
$002E
Timer 2 Counter Modulo
Register High (T2MODH)
Write:
Reset:
Read:
$002F
Timer 2 Counter Modulo
Register Low (T2MODL)
Write:
Reset:
Timer 2 Channel 0 Status ^Read:
$0030 and Control Register Write:
(T2SC0) Reset:
Read:
$0031
Timer 2 Channel 0
Register High (T2CH0H)
Write:
Reset:
$0032
Read:
Timer 2 Channel 0
Register Low (T2CH0L)
Write:
Reset:
Read:
$0033
Unimplemented Write:
Reset:
Read:
$0034
Unimplemented Write:
Reset:
Read:
$0035
Unimplemented Write:
Reset:
Bit 7
Bit 7
0
Bit 15
1
Bit 7
1
CH0F
0
0
Bit 15
Bit 7
0
6
5
4
3
2
6
5
4
3
2
0
14
1
6
1
CH0IE
0
14
6
0
0
0
0
13
12
11
10
1
1
1
1
5
4
3
2
1
1
1
1
MS0B MS0A ELS0B ELS0A
0
0
0
0
13
12
11
10
Indeterminate after reset
5
4
3
2
Indeterminate after reset
0
0
0
0
0
Indeterminate after reset
Indeterminate after reset
= Unimplemented
Figure 22-2. TIM I/O Register Summary (Sheet 2 of 2)
1
Bit 0
1
Bit 0
0
9
1
1
1
TOV0
0
9
0
Bit 8
1
Bit 0
1
CH0MAX
0
Bit 8
1
Bit 0
0
0
22.5.1 TIM Counter Prescaler
The TIM clock source can be one of the seven prescaler outputs or the
TIM clock pin, TCLK. The prescaler generates seven clock rates from
the internal bus clock. The prescaler select bits, PS[2:0], in the TIM
status and control register select the TIM clock source.
Technical Data
340
MC68HC908GR8 — Rev 4.0
Timer Interface Module (TIM)
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