MC908GR8CDWE Datasheet, PDF (172/408 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Freescale Semiconductor, Inc.
External Interrupt (IRQ)
12.7 IRQ Status and Control Register
The IRQ status and control register (INTSCR) controls and monitors
operation of the IRQ module. The INTSCR:
• Shows the state of the IRQ flag
• Clears the IRQ latch
• Masks IRQ interrupt request
• Controls triggering sensitivity of the IRQ1 interrupt pin
Address: $001D
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Write:
IRQF
0
IMASK MODE
ACK
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 12-3. IRQ Status and Control Register (INTSCR)
IRQF — IRQ Flag Bit
This read-only status bit is high when the IRQ interrupt is pending.
1 = IRQ interrupt pending
0 = IRQ interrupt not pending
ACK — IRQ Interrupt Request Acknowledge Bit
Writing a logic 1 to this write-only bit clears the IRQ latch. ACK always
reads as logic 0. Reset clears ACK.
IMASK — IRQ Interrupt Mask Bit
Writing a logic 1 to this read/write bit disables IRQ interrupt requests.
Reset clears IMASK.
1 = IRQ interrupt requests disabled
0 = IRQ interrupt requests enabled
Technical Data
172
MC68HC908GR8 — Rev 4.0
External Interrupt (IRQ)
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