C-3E Datasheet, PDF (89/114 Pages) Freescale Semiconductor, Inc – C-3e NETWORK PROCESSOR SILICON REVISION A1

SICL
SIDA
(output)
SIDA
(input)
AC Timing Specifications
89
MDIO Serial Interface Timing Specifications
The MDIO serial interface timing is shown in Figure 20 and described in Table 45.
Figure 20 MDIO Serial Interface Timing Diagram
Cycle 2
Cycle 3
Cycle 4
T_sic
T_sods T_sodh
T_sids
Table 45 MDIO Serial Interface Timing Description
SYMBOL PARAMETER
MIN TYP
MAX
UNIT
Tsic
SICL Cycle Time
40
ns
Tsids SIDA Input Setup 10
ns
Tsidh SIDA Input Hold 0.0
ns
Tsods SIDA Output Setup 10
ns
Tsodh SIDA Output Hold 10
ns
03