C-3E Datasheet, PDF (88/114 Pages) Freescale Semiconductor, Inc – C-3e NETWORK PROCESSOR SILICON REVISION A1

88
CHAPTER 3: ELECTRICAL SPECIFICATIONS
Table 44 PCI Timing Description
SYMBOL PARAMETER
MIN TYP
MAX UNIT
Tpc
PCI Cycle Time*
15.0
ns
Tpas PAD/P_ctl† Setup
3.0
ns
Tpah PAD/P_ctl Hold
0.0
ns
Tpao PAD/P_ctl Output
2.0
6.0 ns
Tpaz PAD/P_ctl Clk to Tri‡
2.0
6.0 ns
Tpav PAD/P_ctl Clk to Driven‡ 2.0
6.0 ns
Tpgs PGNTX Setup
5.1
ns
Tpgh PGNTX Hold
0.0
ns
Tpis
PIDSEL Setup
3.0
ns
Tpih
PIDSEL Hold
0.0
ns
PRSTX**
ns
PINTA**
ns
* _{66MHz PCI}
† _{P_ctl includes all PCI control parameters including: PPAR, PFRAMEX, PTRDYX, PIRDYX,}
PSTOPX, PDEVSELX, PPERRX, PSERRX
‡ _{Not fully tested, values based on design/characterization.}
** _Asynchronous
C3EN