C-3E Datasheet, PDF (87/114 Pages) Freescale Semiconductor, Inc – C-3e NETWORK PROCESSOR SILICON REVISION A1

AC Timing Specifications
87
Executive Processor
Timing Specifications
The XP timing specifications include:
• PCI Timing Specifications
• MDIO Serial Interface Timing Specifications
• Low Speed Serial Interface Timing Specifications
• PROM Interface Timing Specifications
PCI Timing Specifications
The PCI timing is shown in Figure 19 and described in Table 44.
Cycle 1
Figure 19 PCI Timing Diagram
Cycle 2
Cycle 3
Cycle 4
PCLK
PAD/P_ctl
(output)
T_pao
PAD/P_ctl
(input)
PGNTX
(input)
PIDSEL
(input)
T_pc
T_paz
T_pav
T_pas T_pah
T_pgs T_pgh
T_pis T_pih
Cycle 5
03