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C-3E Datasheet, PDF (27/114 Pages) Freescale Semiconductor, Inc – C-3e NETWORK PROCESSOR SILICON REVISION A1 | |||
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Chapter 2
C3ENPA1-DS/D
Rev 03
SIGNAL DESCRIPTIONS
Signal Summary
There are nine (9) functional groupings of signals in the C-3e Network Processor:
⢠Clock â 7 pins
⢠Channel Processors (CP0 - CP7) â 8x7 = 56 pins
⢠Executive Processor (XP) â 57 pins
â PCI Interface â 50 pins
â PROM Interface â 4 pins
â Serial Bus Interface â 2 pins
â General System Interface â 1 pin
⢠Fabric Processor (FP) â 42 pins
⢠Buffer Management Unit (BMU) â 160 pins
⢠Table Lookup Unit (TLU) â 99 pins
⢠Queue Management Unit (QMU) â 59 pins
⢠Power â 234 pins
⢠Test â 14 pins
Two (2) of the sections (CPs and FP) are configurable, depending on the type of device
being implemented.
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