MC68HC705CT4 Datasheet, PDF (88/152 Pages) Freescale Semiconductor, Inc – General Release Specification

Freescale Semiconductor, Inc.
Dual Phase-Locked Loop (PLL)
TXON — TX Counter Enable
When set, this bit enables the PLL transmit counter.
When clear, it stops the counter in a reset state to save power. TXON
also shuts off the associated phase detector and holds it in three-
state. Initializing the transmit counter before it is enabled is
recommended.
REFON — Reference Counter Enable
When set, this bit enables the PLL reference counter.
When clear, REFON stops the reference counter in a reset state to
save power. Initializing the reference counter before it is enabled is
recommended.
RLOCK — Receive Lock Detect
This bit is read only and is not latched. When set, this bit is a real-time
indication of an active correction pulse from the phase detect in
progress. When clear, no correction is made and the output from the
phase detect is three-stated. Using multiple reads at known intervals
will allow the user to filter and judge a LOCK condition.
TLOCK — Transmit Lock Detect
This bit is read only and is not latched.When set, this bit is a real-time
indication of an active correction pulse from the phase detect in
progress. When clear, no correction is made and the output from the
phase detect is three-stated. Using multiple reads at known intervals
will allow the user to filter and judge a LOCK condition.
General Release Specification
MC68HC705CT4 — Rev. 2.0
88
Dual Phase-Locked Loop (PLL)
MOTOROLA
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