MC68HC705CT4 Datasheet, PDF (114/152 Pages) Freescale Semiconductor, Inc – General Release Specification

EPROM
Freescale Semiconductor, Inc.
15.4.3 Mask Option Register
The mask option register, MOR, contains programmable EPROM bits to
control mask options.
The MOR register is latched upon reset going away.
Address: $1F00
Bit 7
6
5
4
3
2
1
Bit 0
Read:
PC7PU PC6PU PC5PU PC4PU PC23PU PC01PU IRQ
COP
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 15-5. Mask Option Register (MOR)
PCXPU — Port C Pullup (X is 7–4)
When set, the PCPU bit enables the pullup on the corresponding port
C pin. If the PCPU bit is cleared, the pullup devices are disabled. The
erased state of the PCPU bit is to be cleared, thereby disabling the
pullup devices.
PC23PU — Port C Bit 2 and 3 Pullups
When set, the PC23PU bit enables the pullups on both port C bits 2
and 3. If the PC23PU bit is cleared, the pullup devices are disabled.
The erased state of the PC23PU bit is to be cleared, thereby disabling
the pullup devices.
PC01PU — Port C Bit 0 and 1 Pullups
When set, the PC01PU bit enables the pullups on both port C bits 0
and 1. If the PC01PU bit is cleared, the pullup devices are disabled.
The erased state of the PC01PU bit is to be cleared, thereby disabling
the pullup devices.
COP — COP Enable
When set, this bit enables the COP watchdog timer.
When clear, the COP is disabled.
General Release Specification
MC68HC705CT4 — Rev. 2.0
114
EPROM
MOTOROLA
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