MC68HC705CT4 Datasheet, PDF (41/152 Pages) Freescale Semiconductor, Inc – General Release Specification

Freescale Semiconductor, Inc.
Interrupts
Core Timer Interrupt
4.11 Core Timer Interrupt
This timer can create two types of interrupts. A timer overflow interrupt
occurs whenever the 8-bit timer rolls over from $FF to $00 and the
enable bit TOFE is set. A real-time interrupt occurs whenever the
programmed time elapses and the enable bit RTIE is set. Either of
these interrupts vector to the same interrupt service routine, located at
the address specified by the contents of memory locations $1FF4 and
$1FF5.
4.12 Comparator 3 Interrupt
Comparator 3 can create an interrupt when its output (CMP3) gets set
and the enable bit CM3IE is set. The interrupt service routine is located
at the address specified by the contents of memory locations $1FFA and
$1FFB.
MC68HC705CT4 — Rev. 2.0
MOTOROLA
General Release Specification
Interrupts
41
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