MC68HC705CT4 Datasheet, PDF (77/152 Pages) Freescale Semiconductor, Inc – General Release Specification

Freescale Semiconductor, Inc.
Synchronous Serial Interface (SSI)
SSI Power Supply Source
this occurrence, the programmer should ensure that all transfers are
complete before entering the stop mode.
If the SSI is configured to slave mode, further care should be taken in
entering stop mode. The SCK pin will still accept a clock from an external
master, allowing potentially unwanted transfers to take place and power
consumption to be increased. The SSI will not generate interrupt
requests in this situation but, on exiting stop mode through some other
means, the SF flag may be found to be set and an interrupt request will
be generated if SIE is also set at this point.
To avoid these potential problems, it is safer to disable the SSI
completely (SE = 0) before entering stop mode.
The synchronous serial interface (SSI) is a 2-wire master/slave system
including serial clock (SCK) and serial data input/output (SDIO). When
operating as a master device, the serial clock speed is selectable
between four rates.
9.7 SSI Power Supply Source
The power supplied to the SSI is V_DD and V_SS, thus keeping the V_DD2
and V_SS2 free for the noise susceptible modules.
MC68HC705CT4 — Rev. 2.0
MOTOROLA
General Release Specification
Synchronous Serial Interface (SSI)
77
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