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MC68HC705CT4 Datasheet, PDF (22/152 Pages) Freescale Semiconductor, Inc – General Release Specification
Freescale Semiconductor, Inc.
General Description
1.4.5 Reset (RESET)
This active-low pin is used to reset the MCU to a known startup state by
pulling RESET low. The RESET pin contains an internal Schmitt trigger
as part of its input to improve noise immunity. See Section 5. Resets.
1.4.6 Port A (PA0–PA7)
These eight I/O lines comprise port A. The state of any pin is software
programmable, and all port A lines are configured as input during power-
on or reset.
1.4.7 Port B (PB0–PB7)
These eight I/O lines comprise port B. The state of any pin is software
programmable and all port B lines are configured as input during power-
on or reset.
1.4.8 Port C (PC0–PC7/PWM)
These eight I/O lines comprise port C. All port C lines are configured as
input during power-on or reset. Port C has pullup devices and interrupt
capability by pin; however, the state of any pin is determined by the user
at the time of code submission. For a detailed description of I/O
programming, refer to 7.7 Input/Output Port Pin Programming. PC7 is
shared with the output of the pulse-width modulation (PWM) function.
1.4.9 Port D (PD0/CMP3+, PD1/CMP1–, PD2/CMP12+, PD3/CMP2–, PD4/SDIO,
PD5/SCK, and PD6/TCMP)
These seven port lines comprise port D. The state of any pin is software
programmable and the lines are configured as input during power-on or
reset. PD4 and PD5 are shared with the SSI subsystem, PD6 is shared
with the 16-bit timer subsystem, and PD0–PD3 are shared with the
comparators. For a detailed description on I/O programming, refer to 7.7
Input/Output Port Pin Programming.
General Release Specification
MC68HC705CT4 — Rev. 2.0
22
General Description
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