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MC68HC705CT4 Datasheet, PDF (43/152 Pages) Freescale Semiconductor, Inc – General Release Specification
Freescale Semiconductor, Inc.
General Release Specification — MC68HC705CT4
Section 5. Resets
5.1 Contents
5.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43
5.3 External Reset (RESET). . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43
5.4 Internal Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
5.4.1 Power-On Reset (POR). . . . . . . . . . . . . . . . . . . . . . . . . . . .46
5.4.2 Computer Operating Properly Reset (COPR) . . . . . . . . . . .46
5.4.2.1
5.4.2.2
5.4.2.3
Resetting the COP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
COP During Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . .47
COP During Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . .47
5.4.2.4
5.4.2.5
5.4.3
COP Watchdog Timer Considerations . . . . . . . . . . . . . . .47
COP Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
Illegal Address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
5.2 Introduction
The MCU can be reset from four sources: one external input and three
internal restart conditions. The RESET pin is an input with a Schmitt
trigger as shown in Figure 5-1. All the internal peripheral modules will be
reset by the internal reset signal (RST). Refer to Figure 5-2 for reset
timing detail.
5.3 External Reset (RESET)
The RESET pin is the only external source of a reset. This pin is
connected to a Schmitt trigger input gate to provide an upper and lower
threshold voltage separated by a minimum amount of hysteresis. This
external reset occurs whenever the RESET pin is pulled below the lower
threshold and remains in reset until the RESET pin rises above the
upper threshold. This active-low input will generate the RST signal and
MC68HC705CT4 — Rev. 2.0
MOTOROLA
General Release Specification
Resets
43
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