MC68HC705CT4 Datasheet, PDF (23/152 Pages) Freescale Semiconductor, Inc – General Release Specification

1.4.10 TCAP
Freescale Semiconductor, Inc.
General Description
Signal Description
This pin is used for the16-bit timer input capture operation. Depending
on the value of the IEDG bit in the timer control register (TCR), the
appropriate level of transition on TCAP will be monitored. When the
correct level of transition has occurred, the free-running counter will be
transferred to the input capture register.
1.4.11 FinT and FinR
These pins are inputs to the PLL transmit and the receive counters,
respectively. They typically are driven by the loop VCO and are also AC-
coupled. The minimum input signal level is 200 mV peak to peak
@ 60.0 MHz.
1.4.12 PDoutT and PDoutR
These PLL pins are 3-state outputs of the transmit and receive phase
detectors, respectively, for use as either loop error signals or phase
detector signals.
MC68HC705CT4 — Rev. 2.0
MOTOROLA
General Release Specification
General Description
23
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