MC68HC711D3_05 Datasheet, PDF (53/138 Pages) Freescale Semiconductor, Inc – Microcontrollers

HIGHEST
PRIORITY
POWER-ON RESET
(POR)
DELAY 4064 E CYCLES
EXTERNAL RESET
Interrupts
LOAD PROGRAM COUNTER
WITH CONTENTS OF
$FFFE, $FFFF
(VECTOR FETCH)
CLOCK MONITOR FAIL
(WITH CME = 1)
LOAD PROGRAM COUNTER
WITH CONTENTS OF
$FFFC, $FFFD
(VECTOR FETCH)
LOWEST
PRIORITY
COP WATCHDOG
TIMEOUT
(WITH NOCOP = 0)
LOAD PROGRAM COUNTER
WITH CONTENTS OF
$FFFA, $FFFB
(VECTOR FETCH)
SET BITS S, I, AND X
RESET MCU
HARDWARE
1A
BEGIN INSTRUCTION
SEQUENCE
Y
BIT X IN
CCR = 1?
N
XIRQ
Y
PIN LOW?
N
2A
STACK CPU
REGISTERS
SET BITS I AND X
FETCH VECTOR
$FFF4, $FFF5
Figure 4-4. Processing Flow Out of Reset (Sheet 1 of 2)
MC68HC711D3 Data Sheet, Rev. 2.1
Freescale Semiconductor
53