MC68HC711D3_05 Datasheet, PDF (25/138 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory Map
Addr.
$0000
$0001
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Port A Data Register ^Read: _PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
(PORTA) Write:
See page 61. _{Reset: Hi-Z}
0
0
0
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Reserved
R
R
R
R
R
R
R
R
$0002
$0003
$0004
$0005
Port C Control Register ^Read:
0
0
CWOM
0
0
0
0
0
(PIOC) Write:
See page 63. _{Reset: 0}
0
0
0
0
0
0
0
Port C Data Register ^Read: _PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
(PORTC) Write:
See page 63. _Reset:
Reset configures pins as Hi-Z inputs
Port B Data Register ^Read: _PB7
PB6
PB5
PB4
PB3
BP2
BP1
PB0
(PORTB) Write:
See page 62. _Reset:
Reset configures pins as Hi-Z inputs
Reserved
R
R
R
R
R
R
R
R
$0006
$0007
$0008
$0009
$000A
Data Direction Register ^Read:
for Port B (DDRB) Write:
See page 62. _Reset:
Data Direction Register ^Read:
for Port C (DDRC) Write:
See page 63. _Reset:
Port D Data Register ^Read:
(PORTD) Write:
See page 64. _Reset:
Data Direction Register ^Read:
for Port D (DDRD) Write:
See page 64. _Reset:
Reserved
DDB7
0
DDC7
0
PD7
0
DDD7
0
R
DDB6
0
DDC6
0
PD6
0
DDD6
0
R
DDB5
0
DDC5
0
PD5
0
DDD5
0
R
DDB4
0
DDC4
0
PD4
0
DDD4
0
R
DDB3
0
DDC3
0
PD3
0
DDD3
0
R
DDB2
0
DDC2
0
PD2
0
DDD2
0
R
DDB1
0
DDC1
0
PD1
0
DDD1
0
R
DDB0
0
DDC0
0
PD0
0
DDD0
0
R
Timer Compare Force Register ^Read: _FOC1
FOC2
FOC3
FOC4
FOC5
0
0
0
$000B
(CFORC) Write:
See page 93. _{Reset: 0}
0
0
0
0
0
0
0
Output Compare 1 Mask Register ^Read: _{OC1M7 OC1M6 OC1M5 OC1M4 OC1M3}
0
0
0
$000C
(OC1M) Write:
See page 93. _{Reset: 0}
0
0
0
0
0
0
0
Output Compare 1 Data Register ^Read: _{OC1D7 OC1D6 OC1D5 OC1D4 OC1D3}
0
0
0
$000D
(OC1D) Write:
See page 94. _{Reset: 0}
0
0
0
0
0
0
0
= Unimplemented
R = Reserved
U = Unaffected
Figure 2-2. Register and Control Bit Assignments (Sheet 1 of 5)
MC68HC711D3 Data Sheet, Rev. 2.1
Freescale Semiconductor
25