MC68HC711D3_05 Datasheet, PDF (50/138 Pages) Freescale Semiconductor, Inc – Microcontrollers

Resets, Interrupts, and Low-Power Modes
Table 4-2 provides a list of the interrupts with a vector location in memory for each, as well as the actual
condition code and control bits that mask each interrupt. Figure 4-3 shows the interrupt stacking order.
Table 4-2. Interrupt and Reset Vector Assignments
Vector
Address
$FFC0, $FFC1
↓
$FFD4, $FFD5
$FFD6, $FFD7
$FFD8, $FFD9
$FFDA, $FFDB
$FFDC, $FFDD
$FFDE, $FFDF
$FFE0, $FFE1
$FFE2, $FFE3
$FFE4, $FFE5
$FFE6, $FFE7
$FFE8, $FFE9
$FFEA, $FFEB
$FFEC, $FFED
$FFEE, $FFEF
$FFF0, $FFF1
$FFF2, $FFF3
$FFF4, $FFF5
$FFF6, $FFF7
$FFF8, $FFF9
$FFFA, $FFFB
$FFFC, $FFFD
$FFFE, $FFFF
Interrupt Source
Reserved
SCI serial system:
• SCI transmit complete
• SCI transmit data register empty
• SCI idle line detect
• SCI receiver overrun
• SCI receive data register full
SPI serial transfer complete
Pulse accumulator input edge
Pulse accumulator overflow
Timer overflow
Timer input capture 4/output compare 5
Timer output compare 4
Timer output compare 3
Timer output compare 2
Timer output compare 1
Timer input capture 3
Timer input capture 2
Timer input capture 1
Real time interrupt
IRQ (external pin)
XIRQ pin (pseudo non-maskable)
Software interrupt
Illegal opcode trap
COP failure (reset)
Clock monitor fail (reset)
RESET
CCR
Mask
Local
Mask
—
—
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
X bit
None
None
None
None
None
TCIE
TIE
ILIE
RIE
RIE
SPIE
PAII
PAOVI
TOI
I4/O5I
OC4I
OC3I
OC2I
OC1I
IC3I
IC2I
IC1I
RTII
None
None
None
None
NOCOP
CME
None
MC68HC711D3 Data Sheet, Rev. 2.1
50
Freescale Semiconductor