MC9328MX1_06 Datasheet, PDF (29/100 Pages) Freescale Semiconductor, Inc – MX Family of applications processors

Functional Description and Application Information
(HCLK) Bus Clock
Address
Chip-select
Read (Write)
OE (rising edge)
OE (falling edge)
EB (rising edge)
EB (falling edge)
LBA (negated falling edge)
LBA (negated rising edge)
BCLK (burst clock) - rising edge
BCLK (burst clock) - falling edge
Read Data
Write Data (negated falling)
Write Data (negated rising)
DTACK_B
1a
2a
3a
4a
4c
5a
5c
6a
6a
7a
7c
9a
9a
10a
1b
2b
3b
4b
4d
5b
5d
6b
6c
7b
7d
8b
8a
9b
9c
10a
Figure 5. EIM Bus Timing Diagram
Table 12. EIM Bus Timing Parameter Table
Ref No.
Parameter
1a Clock fall to address valid
1b Clock fall to address invalid
2a Clock fall to chip-select valid
2b Clock fall to chip-select invalid
3a Clock fall to Read (Write) Valid
3b Clock fall to Read (Write) Invalid
1.8 ± 0.1 V
3.0 ± 0.3 V
Unit
Min Typical Max Min Typical Max
2.48 3.31 9.11 2.4
3.2
8.8 ns
1.55 2.48 5.69 1.5
2.4
5.5 ns
2.69 3.31 7.87 2.6
3.2
7.6 ns
1.55 2.48 6.31 1.5
2.4
6.1 ns
1.35 2.79 6.52 1.3
2.7
6.3 ns
1.86 2.59 6.11 1.8
2.5
5.9 ns
MC9328MX1 Technical Data, Rev. 7
Freescale Semiconductor
29