MC9328MX1_06 Datasheet, PDF (16/100 Pages) Freescale Semiconductor, Inc – MX Family of applications processors

Table 3. MC9328MX1 Signal Multiplexing Scheme (Continued)
I/O Supply BGA
Voltage Pin
Primary
Signal
Dir Pull-up
NVDD2 R14
TDO
O
NVDD2 N15
TMS
I
69K
NVDD2 L9
NVDD2 N16
NVDD2 P14
TCK
TDI
I2C_SCL
I
69K
I
69K
O
NVDD2 P15 I2C_SDA
I/O
NVDD2 N13 CSI_PIXCLK I
NVDD2 M13 CSI_HSYNC I
NVDD2 M14 CSI_VSYNC I
NVDD2 N14
CSI_D7
I
NVDD2 M15
NVDD2 M16
NVDD2 J10
CSI_D6
CSI_D5
VSS
I
I
Static
NVDD2 M12
CSI_D4
I
NVDD2 L16
CSI_D3
I
NVDD2 L15
CSI_D2
I
NVDD2 L14
CSI_D1
I
NVDD2 L13
CSI_D0
I
NVDD2 L12 CSI_MCLK
O
NVDD2 L11
PWMO
O
NVDD2 L10
TIN
I
NVDD2 K15 TMR2OUT
O
NVDD2 K16
LD15
O
NVDD2 K14
LD14
O
NVDD2 K13
LD13
O
Alternate
Signal
Dir Mux Pull-up
GPIO
Ain
Bin
PA16 69K
PA15 69K
PA14 69K
PA13 69K
PA12 69K
PA11 69K
PA10 69K
PA9
69K
PA8
69K
PA7
69K
PA6
69K
PA5
69K
PA4
69K
PA3
69K
PA2
69K
PA1
69K
PD31 69K SPI2_TxD
PD30 69K
PD29 69K
PD28 69K
Aout
RESE
State (At/After)
Default
Hiz⁵
Pull-H
Pull-H
Pull-H
Pull-H
Pull-H
Pull-H
Pull-H
Pull-H
Pull-H
Pull-H
Pull-H
PA16
PA15
PA14
PA13
PA12
PA11
PA10
PA9
SPI2_RxD
Pull-H
Pull-H
Pull-H
Pull-H
Pull-H
Pull-H
Pull-H
Pull-H
Pull-H
Pull-H
Pull-H
Pull-H
PA8
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PD31
PD30
PD29
PD28