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MC9328MX1_06 Datasheet, PDF (21/100 Pages) Freescale Semiconductor, Inc – MX Family of applications processors
Table 3. MC9328MX1 Signal Multiplexing Scheme (Continued)
I/O Supply BGA
Voltage Pin
Primary
Signal
Dir Pull-up
Alternate
Signal
Dir Mux Pull-up
GPIO
Ain
Bin
Aout
RESE
State (At/After)
Default
NVDD4 F6
SIM_RST
O
SSI_TXFS I/O PB18 69K
Pull-H
PB18
NVDD4 G6
SIM_RX
I
SSI_TXDAT O PB17 69K
Pull-H
PB17
NVDD4 B4
SIM_TX
I/O
SSI_RXDAT I PB16 69K
Pull-H
PB16
NVDD4 C4
SIM_PD
I
SSI_RXCLK I/O PB15 69K
Pull-H
PB15
NVDD4 D4 SIM_SVEN
O
SSI_RXFS I/O PB14 69K
Pull-H
PB14
NVDD4 B3
SD_CMD
I/O
MS_BS
O PB13 69K
Pull-H
PB13
NVDD4 A3
SD_CLK
O
MS_SCLKO O PB12 69K
Pull-H
PB12
NVDD4 A2
SD_DAT3
I/O
MS_SDIO
I/O PB11 69K
(pull down)
Pull-L
PB11
NVDD4 E5
SD_DAT2
I/O
MS_SCLKI
I PB10 69K
Pull-H
PB10
NVDD4 B2
SD_DAT1
I/O
MS_PI1
I PB9
69K
Pull-H
PB9
NVDD4 C3
SD_DAT0
I/O
MS_PI0
I PB8
69K
Pull-H
PB8
1 After reset, CS0 goes H/L depends on BOOT[3:0].
2 Need external circuitry to drive the signal.
3 Need external pull-up.
4 External resistor is needed.
5 Need external pull-up or pull-down.
6 ASP signals are clamped by AVDD2 to prevent ESD (electrostatic discharge) damage. AVDD2 must be greater than QVDD to keep diodes reverse-biased.