M0564LE4AE Datasheet, PDF (74/161 Pages) List of Unclassifed Manufacturers – 32-BIT MICROCONTROLLER

M0564
according to the accurate LXT (32.768 kHz crystal oscillator), automatically gets accurate HIRC output
frequency, 0.25 % deviation within all temperature ranges.
For instance, the system needs an accurate 22.1184 MHz clock. In such case, if users do not want to
use PLL as the system clock source, they need to solder 32.768 kHz crystal in system, and set
FREQSEL (SYS_IRCTCTL0[1:0] trim frequency selection) to “01”, set REFCKSEL
(SYS_IRCTCTL0[9] reference clock selection) to “0”, and the auto-trim function will be enabled.
Interrupt status bit FREQLOCK (SYS_IRCTISTS[0] HIRC frequency lock status) “1” indicates the
HIRC0 output frequency is accurate within 0.25% deviation. To get better results, it is recommended
to set both LOOPSEL (SYS_IRCTCTL[5:4] trim calculation loop) and RETRYCNT
(SYS_IRCTCTL[7:6] trim value update limitation count) to “11”.
6.2.9 UART1_TXD modulation with PWM
This chip supports UART1_TXD to modulate with PWM channel. User can set
MODPWMSEL(SYS_MODCTL[6:4]) to choice which PWM0 channel to modulate with UART1_TXD
and set MODEN(SYS_MODCTL[0]) to enable modulation function. User can set
TXDINV(UART_LINE[8]) to inverse UART1_TXD before moulating with PWM.
PWM0_CHx
UART1_TXD
TXDINV = 0 & MODH = 0
TXDINV = 0 & MODH = 1
TXDINV = 1 & MODH = 0
TXDINV = 1 & MODH = 1
Figure 6.2-10 UART1_TXD Modulated with PWM Channel
6.2.10 Voltage Detector (VDET)
This chip supports low power comparator to detect external voltage. User can control Bandgap active
interval and comparator active interval to achieve low power detection purpose. There is no debounce
function in Power-down mode since no HCLK available in Power-down mode.
May 05, 2017
Page 74 of 161
Rev 1.00