M0564LE4AE Datasheet, PDF (104/161 Pages) List of Unclassifed Manufacturers – 32-BIT MICROCONTROLLER

M0564
6.16.4 Programming Examples
Example 1: The SPI controller is set as a full-duplex master to access an off-chip slave device
with the following specifications:
 Data bit is latched on positive edge of SPI bus clock.
 Data bit is driven on negative edge of SPI bus clock.
 Data is transferred from MSB first.
 SPI bus clock is idle at low state.
 Only one byte of data to be transmitted/received in a transaction.
 Use the first SPI slave select pin to connect with an off-chip slave device. The slave
selection signal is active low.
The operation flow is as follows:
1) Set DIVIDER (SPIx_CLKDIV [7:0]) to determine the output frequency of SPI clock.
2) Write the SPIx_SSCTL register a proper value for the related settings of Master mode:
1. Clear AUTOSS (SPIx_SSCTL[3]) to 0 to disable the Automatic Slave Selection function.
2. Configure slave selection signal as active low by clearing SSACTPOL (SPIx_SSCTL[2])
to 0.
3. Enable slave selection signal by setting SS (SPIx_SSCTL[0]) to 1 to activate the off-chip
slave device.
3) Write the related settings into the SPIx_CTL register to control the SPI master actions.
1. Configure this SPI controller as master device by setting SLAVE (SPIx_CTL[18]) to 0.
2. Force the SPI clock idle state at low by clearing CLKPOL (SPIx_CTL[3]) to 0.
3. Select data transmitted on negative edge of SPI bus clock by setting TXNEG
(SPIx_CTL[2]) to 1.
4. Select data latched on positive edge of SPI bus clock by clearing RXNEG (SPIx_CTL[1])
to 0.
5. Set the bit length of a transaction as 8-bit in DWIDTH bit field (SPIx_CTL[12:8] = 0x08).
6. Set MSB transfer first by clearing LSB (SPIx_CTL[13]) to 0.
4) Set SPIEN (SPIx_CTL[0]) to 1 to enable the data transfer with the SPI interface.
5) If this SPI master attempts to transmit (write) one byte data to the off-chip slave device, write
the byte data that will be transmitted into the SPIx_TX register.
6) Waiting for SPI interrupt if the UNITIEN (SPIx_CTL[17]) is set to 1, or just polling the unit
transfer interrupt flag UNITIF (SPIx_STATUS[1]).
7) Read out the received one byte data from SPIx_RX register.
8) Go to 5) to continue another data transfer or set SS (SPIx_SSCTL[0]) to 0 to inactivate the
off-chip slave device.
Example 2: The SPI controller is set as a full-duplex slave device and connects with an off-chip
master device. The off-chip master device communicates with the on-chip SPI slave controller
through the SPI interface with the following specifications:
May 05, 2017
Page 104 of 161
Rev 1.00