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M0564LE4AE Datasheet, PDF (15/161 Pages) List of Unclassifed Manufacturers – 32-BIT MICROCONTROLLER | |||
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M0564
â Supports Auto-Baud Rate measurement and baud rate compensation function
â Supports break error, frame error, parity error and receive/transmit buffer overflow
detection function
â Fully programmable serial-interface characteristics
ï® Programmable number of data bit, 5-, 6-, 7-, 8- bit character
ï® Programmable parity bit, even, odd, no parity or stick parity bit generation and
detection
ï® Programmable stop bit, 1, 1.5, or 2 stop bit generation
â Supports IrDA SIR function mode
ï® Supports for 3/16 bit duration for normal mode
â Supports LIN function mode
ï® Supports LIN master/slave mode
ï® Supports programmable break generation function for transmitter
ï® Supports break detection function for receiver
â Supports RS-485 mode
ï® Supports RS-485 9-bit mode
ï® Supports hardware or software enables to program nRTS pin to control RS-485
transmission direction
â Supports nCTS, incoming data, Received Data FIFO reached threshold and RS-485
Address Match (AAD mode) wake-up function
ï¬Supports PDMA transferSmart Card Host (SC)
â Supports up to two Smart Card Hosts
SC Mode
UART Mode
SC_DATA
Rx
SC_CLK
Tx
SC_CD
-
SC_PWR
-
SC_RST
-
â SC Mode
ï® Supports up to two ISO-7816-3 ports
ï® Compliant to ISO-7816-3 T=0, T=1
ï® Separate receive / transmit 4 bytes entry FIFO for data payloads
ï® Programmable transmission clock frequency
ï® Programmable receiver buffer trigger level
ï® Programmable guard time selection (11 ETU ~ 266 ETU)
ï® One 24-bit and two 8-bit time-out counters for Answer to Request (ATR) and
waiting times processing
ï® Supports auto inverse convention function
ï® Supports transmitter and receiver error retry and error limit function
ï® Supports hardware activation sequence process
ï® Supports hardware warm reset sequence process
ï® Supports hardware deactivation sequence process
ï® Supports hardware auto deactivation sequence when detecting the card is
removal
â UART Mode
ï® Full duplex, asynchronous communications
ï® Supports receiving / transmitting 4-bytes FIFO
ï® Supports programmable baud rate generator for each channel
ï® Programmable even, odd or no parity bit generation and detection
ï® Programmable stop bit, 1 or 2 stop bit generation
ï¬ SPI/I2S
â Supports up to two SPI/I2S controllers
May 05, 2017
Page 15 of 161
Rev 1.00
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