M0564LE4AE Datasheet, PDF (117/161 Pages) List of Unclassifed Manufacturers – 32-BIT MICROCONTROLLER

without Dead-Time:
PWMx_CH0
PWMx_CH1
M0564
with Dead-Time:
PWMx_CH0
PWMx_CH1
Dead-Time Interval
Figure 6.17-14 Dead-Time Insertion
6.17.3.16 PWM Mask Output Control
PWMx_CH0/CH1 output value can be masked to specified logic states by setting MSKEN0/1
(TIMERx_PWMMSKEN[1:0]) and MSKDAT0/1 (TIMERx_PWMMSK[1:0]). The PWM output mask
function is useful when controlling various types of Electrically Commutated Motor (ECM) like a
BLDC motor. Figure 6.17-15 shows an example of PWM output mask control in PWMx_CH0 and
PWMx_CH1.
MSKEN1/0
(TIMERx_PWMMSKEN[1:0])
MSKDAT1/0
(TIMERx_PWMMSK[1:0])
0x2 (mask channel 1)
0x0
0x1 (mask channel 0)
0x1
PWMx_CH0
PWMx_CH1
Figure 6.17-15 PWM Output Mask Control Waveform
6.17.3.17 PWM Brake Control
Each PWM generator supports one external input brake pin as PWM brake event source. User
can select active brake pin source in BKPINSRC (TIMERx_PWMBNF[17:16]), TM_BRAKEx
(x=0~3). There is a 3-bit noise filter counter to filter the external brake pin signal. User can enable
BRKNFEN (TIMERx_PWMBNF[0]) to enable the brake pin noise filter function and the noise filter
sampling clock can be selected by setting BRKNFSEL (TIMERx_PWMBNF[3:1]) to fit different
noise properties. Moreover, by setting BRKFCNT (TIMERx_PWMBNF[6:4]), user can define by
how many sampling clock cycles a filter will recognize the effective edge of the brake pin signal.
In addition, brake pin polar can be inversed by setting BRKPINV (TIMERx_PWMBNF[7]) to
realize the polarity setup for the brake control signals. Set BRKPINV to 0, brake event will
occurred when TM_BRAKEx (x=0~3) pin status from low to high; set BRKPINV to 1, brake event
May 05, 2017
Page 117 of 161
Rev 1.00