M0564LE4AE Datasheet, PDF (11/161 Pages) List of Unclassifed Manufacturers – 32-BIT MICROCONTROLLER

M0564
2 FEATURES
2.1 NuMicro^® M0564 Features
 Core
– ARM^® Cortex^® -M0 core running up to 72 MHz
– One 24-bit system timer
– Supports low power sleep mode
– Single-cycle 32-bit hardware multiplier
– NVIC for the 32 interrupt inputs, each with 4-levels of priority
– Supports programmable mask-able interrupts
– Serial Wire Debug supports with 2 watch-points/4 breakpoints
Built-in LDO for wide operating voltage ranged from 2.5V to 5.5V
Flash Memory
– Supports 256/128 KB application ROM (APROM)
– Supports 4 KB Flash for loader (LDROM)
– Supports 2 KB Security Protection Rom (SPROM)
– Supports 12 bytes User Configuration block to control system initiation
– Supports Data Flash with configurable memory size
– Supports 2 KB page erase for all embedded flash
– Supports In-System-Programming (ISP), In-Application-Programming (IAP) update
embedded flash memory
– Supports CRC-32 checksum calculation function
– Supports flash all one verification function
– Hardware external read protection of whole flash memory by Security Lock Bit
– Supports 2-wired ICP update through SWD/ICE interface
SRAM Memory
– 20 KB embedded SRAM
– Supports byte-, half-word- and word-access
– Supports PDMA mode
Hardware Divider
– Signed (two’s complement) integer calculation
– 32-bit dividend with 16-bit divisor calculation capacity
– 32-bit quotient and 32-bit remainder outputs (16-bit remainder with sign extends to 32-
bit)
– Divided by zero warning flag
– 6 HCLK clocks taken for one cycle calculation
– Write divisor to trigger calculation
– Waiting for calculation ready automatically when reading quotient and remainder
PDMA (Peripheral DMA)
– Supports 5 independent configurable channels for automatic data transfer between
memories and peripherals
– Supports single and burst transfer type
– Supports Normal and Scatter-Gather Transfer modes
– Supports two types of priorities modes: Fixed-priority and Round-robin modes
– Supports byte-, half-word- and word-access
– Supports incrementing mode for the source and destination address for each channel
– Supports time-out function for channel 0 and channel 1
– Supports software and SPI/I2S, UART, USCI, ADC, PWM and TIMER request
Clock Control
May 05, 2017
Page 11 of 161
Rev 1.00