M32L1632512A Datasheet, PDF (47/54 Pages) List of Unclassifed Manufacturers – 256K x 32 Bit x 2 Banks Synchronous Graphic RAM

$%
M32L1632512A
Write Interrupted by Precharge Command & Write Burst Stop Cycle (@ Full Page Only)
0
1
2
3
4
5
6
7
8
9
10
11 12
13 14 15 16
17 18 19
CLOCK
CKE
HIGH
CS
RAS
CAS
ADDR
RAa
CAa
CAb
A1 0
A9
RAa
WE
DSF
DQM
DQ
Row Active
( A-Ban k)
*N ot e 1
*N ot e 1
tBDL
tRDL
*Note3
*Note2
DAa0 DAa1 DAa2 DAa3 DAa4
DAb0 DAb1 DAb2 DAb3 DAb4 DAb5
W rite
(A-Bank)
Burst Stop
Write
(A-Bank)
Precharge
(A- Bank)
:Don't Care
*Note : 1. At full page mode, burst is warp-around at the end of burst. So auto precharge is impossible.
2. Data-in at the cycle of burst stop command cannot be written into the corresponding memory cell.
It is defined by AC parameter of tBDL (=1CLK).
3. Data-in at the cycle interrupted by precharge cannot be written into the corresponding memory cell.
It is defined by AC parameter of tRDL (=1CLK).
DQM at write interrupted by precharge command is needed to ensure tRDL of 1CLK.
DQM should mask invalid input data on precharge command cycle when asserting precharge before end of burst.
Input data after Row precharge cycle will be masked internally.
4. Burst stop is valid only at full page burst length.
Elite Semiconductor Memory Technology Inc.
Publication Date : Jun. 2001
Revision : 1.6
47/54