M32L1632512A Datasheet, PDF (3/54 Pages) List of Unclassifed Manufacturers – 256K x 32 Bit x 2 Banks Synchronous Graphic RAM

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M32L1632512A
PIN DESCRIPTION
PIN
CLK
CS
CKE
A0 ~ A9
A10(BA)
RAS
CAS
WE
DQMi
DQi
DSF
VDD/VSS
VDDQ/VSSQ
NAME
System Clock
Chip Select
Clock Enable
Address
Bank Select Address
Row Address Strobe
Column Address Strobe
Write Enable
Data Input/Output Mask
Data Input/Output
Define Special/ Function
Power Supply/ Ground
Data Output Power/Ground
INPUT FUNCTION
Active on the positive going edge to sample all inputs
Disables or enable device operation by masking or enabling all
inputs except CLK, CKE and DQMi
Masks system clock to freeze operation from the next clock cycle.
CKE should be enabled at least one clock+ tss prior to new
command.
Disable input buffers for power down in standby.
Row / column addresses are multiplexed on the same pins.
Row address : RA0~RA9, column address : CA0~CA7
Selects bank to be activated during row address latch time.
Selects bank for read / write during column address latch time.
Latches row addresses on the positive going edge of the CLK with
RAS low.
Enables row access & precharge.
Latches column address on the positive going edge of the CLK
With
CAS low.
Enables column access.
Enables write operation and Row precharge.
Makes data output Hi-Z, tSHZ after the clock and masks the output.
Blocks data input when DQM active. (Byte Masking)
Data inputs/outputs are multiplexed on the same pins.
Enables write per bit, block write and special mode register set.
ABSOLUTE MAXIMUM RATINGS (Voltage referenced to VSS)
Parameter
Symbol
Value
Unit
Voltage on any pin relative to VSS
VIN, VOUT
-1.0 ~ 4.6
V
Voltage on VDD supply relative to VSS
VDD, VDDQ
-1.0 ~ 4.6
V
Storage temperature
TSTG
-55 ~ +150
i
Power dissipation
PD
1
W
Short circuit current
IOS
50
mA
Note : Permanent device damage may occur if “ABSOLUTE MAXIMUM RATINGS” are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device
reliability.
Elite Semiconductor Memory Technology Inc.
Publication Date : Jun. 2001
Revision : 1.6
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