M32L1632512A Datasheet, PDF (44/54 Pages) List of Unclassifed Manufacturers – 256K x 32 Bit x 2 Banks Synchronous Graphic RAM

$%
M32L1632512A
Read & Write Cycle with Auto Precharge II @ Burst Length =4
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19
CLOCK
CKE
HIGH
CS
RAS
CAS
ADDR
Ra
Rb Ca
Cb
Ra
Ca
A10
A9
Ra
Rb
Ra
WE
DSF
DQM
DQ CL=2
Qa0 Qa1 Qb0 Qb1 Db2 Db3
Qa0 Qa1 Qb0 Qb1 Db2 Db3
Da0 Da1
Da0 Da1
Row Active
(A-Bank)
Read with
Auto Precharge
( A- Bank )
Row Active
(B- Ban k )
Read without Auto
Pr ec har ge(B -Ban k )
Au toP reaharge
Start Point
(A-Bank)
Precharge
(B- Bank)
Row Active
(A- Ban k )
Write with
Auot Precharge
( A- Bank )
:Don't Care
*Note : 1. When Read(Write) command with auto precharge is issued at A-Bank after A and B Bank activation.
- If Read(Write) command without auto precharge is issued at B-Bank before A Bank auto precharge starts, A Bank
auto precharge will start at the next cycle of B Bank read command input point.
- any command can not be issued at A Bank during tRP after A Bank auto precharge starts.
Elite Semiconductor Memory Technology Inc.
Publication Date : Jun. 2001
Revision : 1.6
44/54