AMIS-53050 Datasheet, PDF (91/107 Pages) AMI SEMICONDUCTOR – Frequency Agile Transceiver

AMIS-53050 Frequency Agile Transceiver
Data Sheet
Table 98: TX/RX Data Protocols
Modulation
AM
Detector CDR
RSSI
Opt¹
Preamble
CW
SOF
Yes²
ID/LOP/CRC
See Table 99
Slice
Fixed/Auto
FM (<20kbps) PLL
Yes 1 0 pattern ------- See Table 99
-------------
FM (>20kbps) FFT
Yes
3
4
See Table 99
-------------
Notes:
1. The use of the CDR function to recover the data is recommended for AM/OOK modulation.
2. The SOF for AM modulation is suggested to be 55 (HEX) for NRZ and 0A (HEX) for Manchester encoded data.
3. The preamble for FM (FFT) with NRZ data is a 1 0 repeating pattern. The preamble for FM (FFT) with Manchester encoded data is all 1s or all 0s.
4. A SOF is only required for FM (FFT) when the data is Manchester encoded. The suggested SOF is a pattern of 55 (HEX) or AA (HEX).
Table 99: Interface Data Protocols
TX/RX Data Protocol
Interface Data
Protocol
Comments
LOP CRC
N
N
Interface
Active
Data
Stream¹
Data is streamed out the interface as it is received
N
N
Active*
Stream
* Data is streamed out the interface starting with the wake-up on ID
Y
N
Interrupt
Buffered
An interrupt is issued when data reception is complete
Y
Y
Interrupt
Buffered
An interrupt is issued when data reception is complete
Note:
1. When the interface uses streaming data, the AMIS-53050 must be the master.
The serial data interface for the AMIS-53050 can be configured to be:
• A 3-wire interface or a 4-wire SPI interface
• A master or a slave for both receive and transmit operation.
• Data can be sampled on the rising, or falling edge of DCLK. The setting for the sampling polarity applies to all modes.
Table 100: Serial Data Interface Configuration
General Options B
Bit 7
Bit 6
Bit 2
# Port
Pins
AMIS-53050
0
0
X
3
0
1
X
3
1
0
X
4
1
1
X
4
X
X
0
X
X
X
1
X
Master
Slave
Master
Slave
X
X
Data Port Configuration
Edge
Sample
DCLK
Pin Function Definition
DSSN
DRXTX DOPT
X
Output
Output
I/O
X
X
Input
Input
I/O
X
X
Output
Output
Output
Input
X
Input
Input
Output
Input
Falling
Rising
7.2.1. AMIS-53050 in Master Mode
In receive mode, the DSSN pin will transition low when the AMIS-53050 has received data. Immediately following the transition of
DSSN, the AMIS-53050 will provide a synchronized bit clock on DCLK, and the received data will appear on DRXTX.
In transmit mode, the transition of DSSN is used to signal an external host controller that the AMIS-53050 is ready for transmit data and
is ready to receive that data on the DRXTX pin. Immediately following the transition of DSSN, the AMIS-53050 will provide a
synchronous clock on DCLK for the host controller to use for loading transmit data into the AMIS-53050.
AMI Semiconductor – Jan. 07, M-20639-002
91
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