AMIS-53050 Datasheet, PDF (77/107 Pages) AMI SEMICONDUCTOR – Frequency Agile Transceiver

AMIS-53050 Frequency Agile Transceiver
Data Sheet
6.10.1. Internal Trim
6.10.1.1. Crystal Trim
Table 70: Crystal Trim - 0X21 [33]
Bit Name
Comment
7:0 _{XTAL_TRIM [7:0]} 24MHz internal trim caps; FF is max capacitance, 00 is min
6.10.1.2. LNA Trim
The LNA trim requires that a known signal be applied to the AMIS-53050 receiver. Once a known signal is applied, the LNA self-
calibration can be run to determine the value for this register. The signal should be higher than minimum sensitivity. The LNA calibration
uses this signal to trim the input and output as well as gain parameters to maximize the gain of the LNA.
Table 71: LNA Trim - 0X22 [34]
Bit Name
Comment
7:4 _{LNA_OUT[3:0}} LNA output tank cap trim F is max cap
3:0 _{LNA_IN [3:0]}
LNA input shunt capacitor trim, F is max, 0 is min
6.10.1.3. Quick Start Oscillator Trim
This register contains the value of the trim from the self calibration.
Table 72: Quick Start Oscillator Trim - 0X23 [35]
Bit Name
Comment
7:0 _{QS_TRIM [7:0]}
Trim for the Quick Start (kicker), this register is written to by the calibration circuit
6.10.1.4. 10K Oscillator Trim
This register contains the value of the trim from the self calibration.
Table 73: 10kHz Oscillator Trim - 0X24 [36]
Bit Name
Comment
7:0 _{RC_TRIM [7:0]}
Trim for the 10kHz oscillator, this register is written by the calibration circuit
6.10.1.5. Analog Trim1
This is an internal use register with no user-defined meaning. This register is set at the factory and changing the value will cause the
AMIS-53050 to not operate.
6.10.1.6. Analog Trim2
This is an internal use register with no user-defined meaning. This register value is set at the factory and changing the value will cause
the AMIS-53050 to not operate.
AMI Semiconductor – Jan. 07, M-20639-002
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