AMIS-53050 Datasheet, PDF (28/107 Pages) AMI SEMICONDUCTOR – Frequency Agile Transceiver

AMIS-53050 Frequency Agile Transceiver
Data Sheet
Figure 16: 3-Wire Serial Data Interface
5.9 System Clock
The system clock can be used as a clock for the external host controller. The clock frequency can be divided down from the 24MHz
crystal frequency. In this case, the system clock can be output according to the following conditions:
• Will be output in RX or TX, unless the output is off in general options B (Bit 1:0)
• The output will start back up in the idle mode after a packet is received
The output will start back up in the housekeeping mode if wake-up external host controller is enabled in the housekeeping configuration
(Bit 6).
Note: The SYSclk produces harmonics, which may land within the AMIS-53050 receiver frequency and may reduce the sensitivity of
the receiver.
• For example, the 30^th harmonic of a 12MHz SYSclk is 360MHz and would affect receiver sensitivity of a system designed for
360MHz operation.
• A suggestion is to disable the SYSclk output in applications not using this feature of the AMIS-53050.
• The PCB layout of an application, which uses the SYSclk must use good isolation techniques for reducing the noise from the
SYSclk output in the AMIS-53050 receiver.
AMI Semiconductor – Jan. 07, M-20639-002
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