AMIS-53050 Datasheet, PDF (73/107 Pages) AMI SEMICONDUCTOR – Frequency Agile Transceiver

AMIS-53050 Frequency Agile Transceiver
Data Sheet
Used to set the options for the burst mode of operation:
R_BURST: These bits set the number of times the packet is to be repeated each burst interval. This can be used to increase
the probability that all packets will get through when several burst transmitters are located in the same area.
Send Chip ID: This option is included to allow for the operating case of having multiple transmitters sending to a single
receiver or for one transmitter to send to one receiver. The multiple transmitters will need to be configured to send the global
chip ID in the TX config options so that the receiver will wake on all transmitter’s packet. Sending the chip ID as part of the
payload allows a single transmitter to send to only that receiver which has the same Chip ID.
Send Internal ADC Data: When enabled, the AMIS-53050 will perform conversions on the battery voltage and temperature
sensor and includes these conversions as part of the packet payload.
Send External ADC Data: When enabled, the AMIS-53050 will perform conversions on the two external ADC inputs and
includes these conversions as part of the packet payload.
Burst Interval Resolution: Used to define the clock frequency for the burst interval timer.
Table 60: Burst Config - 0X16 [22]
Bit Name
State
Comment
1
7
Reserved
0
1
6
Reserved
0
00
5:4 R_BURST[1:0]
01
10
11
Packet is sent one time
Packet is repeated once
Packet is repeated two times
Packet is repeated three times
Repeat interval*
1
3
Send dhip ID
0
Chip ID is included as part of the packet
2
Send Internal
ADC Data
1
0
Data for temperature and battery is sent
1
Send external
ADC data
1
0
Data for EXT1, EXT2 is sent
0
Burst interval
resolution
1
0
Burst interval timer resolution is 15s
Burst interval timer resolution is 50ms
Note: When the burst transmission is repeated, the interval between transmissions is a random time period produced in a random number generator with the chip ID value
used to seed the random number generator.
6.7.3.1. Burst Interval
Burst interval defines the period for the normal burst transmission to occur. This is a cyclic mode and the AMIS-53050 will transmit the
contents of a register at the end of each interval. This interval is fixed by the register value unlike the random time interval when the
transmission is repeated.
Table 61: Burst Interval - 0X17 [23]
Bit
Name
Comment
7:0
BURST_INT [7:0] ^{Burst interval= (BURST_INT+1)*Burst interval resolution}
AMI Semiconductor – Jan. 07, M-20639-002
73
www.amis.com