AMIS-53050 Datasheet, PDF (41/107 Pages) AMI SEMICONDUCTOR – Frequency Agile Transceiver

AMIS-53050 Frequency Agile Transceiver
Data Sheet
Note that there are two low-power modes for the AMIS-53050; stand-by and idle.
Stand-by allows the SYSCLK output
Idle is the very low power state without SYSCLK output (allows for housekeeping, sniff or burst functions)
The device’s control logic may ignore a new instruction if it is busy or if it is not ready to receive the instruction. For example if a self-
calibration is in process and the transceiver is to transmit or receive a message, the instruction may be ignored. It is recommended that
the host controller is configured to monitor the transceiver’s status registers listed below prior to issuing a new instruction:
Busy
Status/Flag Register 2 bit 0 indicates that the AMIS-53050 is still performing a task
Instruction Enable Status/Flag Register 1 bit 1 indicates that the AMIS-53050 is ready to receive a new instruction
Note: Instructions issued to the command register may be ignored by the AMIS-53050 if it is busy (busy status bit) or it if is not ready to
receive a new instruction (instruction enable status bit). An application program should poll these status flags.
6.3 Functional Flow Diagrams
AMI Semiconductor – Jan. 07, M-20639-002
www.amis.com
Figure 29a: Receiver Flow Diagram
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