AK4951AEN Datasheet, PDF (95/105 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/HP/SPK-AMP

[AK4951A]
■ Digital Microphone Input (Stereo)
FS3-0 bits
(Addr:06H, D3-0)
Timer Select
(Addr:09H)
1011
(1)
00H
(2)
ALC Setting
(Addr:0AH, 0BH)
60H,00H
(3)
REF7-0 bits
(Addr:0CH)
E1H
(4)
IVL7-0 bits
(Addr:0DH)
E1H
(5)
Auto HPF Setting
(Addr:1AH)
0CH
(6)
Filter Select
(Addr:1BH,1CH,30H)
Digital Filter Path
(Addr:1DH)
01H,00H,00H
(7)
03H
(8)
Filter Co-efficient
xxH
(Addr:1EH-2FH,32H-4FH)
(9)
ALC State
ALC Disable
1011
00H
6CH,2EH
E1H
6CH,0EH
(14)
E1H
2CH
01H,xxH,xxH
03H
xxH
ALC Enable
ALC Disable
PMPFIL bit
(Addr:00H, D7)
Digital MIC
(Addr:08H)
00H
(10)
31H
(11) ^1059/fs
(13)
00H
(12)
Example:
PLL Master Mode
Audio I/F Format: I2S Compatible
Sampling Frequency: 48kHz
Digital MIC setting:
Data is latched on the DMCLK falling edge.
ALC setting: Refer to Table 42
HPF1: fc=3.7Hz, ADRST1-0 bits = “00”
Auto HPF ON
(1) Addr:06H, Data:0BH
(2) Addr:09H, Data:00H
(3) Addr:0AH, Data:6CH
Addr:0BH, Data:2EH
(4) Addr:0CH, Data:E1H
(5) Addr:0DH, Data:E1H
(6) Addr:1AH, Data:2CH
(7) Addr:1BH, Data:01H
Addr:1CH, Data:xxH
Addr:30H, Data:xxH
(8) Addr:1DH, Data:03H
(9) Addr:1EH-2FH, Data:xxH
Addr:32H-4FH, Data:xxH
(10) Addr:00H, Data:C0H
(11) Addr:08H, Data:31H
Recording
(12) Addr:08H, Data:00H
SDTO pin
State
0 data output
Normal
Data ouput
0 data output
(13) Addr:00H, Data:40H
(14) Addr:0BH, Data:0DH
Figure 64. Digital Microphone Input Recording Sequence
<Sequence>
This sequence is an example of ALC setting at fs=48kHz. For changing the parameter of ALC, please
refer to Table 43. At first, clocks should be supplied according to “Clock Set Up” sequence.
(1) Set up a sampling frequency (FS3-0 bits). When the AK4951A is PLL mode, Digital Microphone of
(11) and Programmable Filter of (10) must be powered-up in consideration of PLL lock time after
a sampling frequency is changed.
(2) Set up FRN, FRATT and ADRST1-0 bits (Addr = 09H)
(3) Set up ALC mode. (Addr = 0AH, 0BH)
(4) Set up REF value for ALC (Addr = 0CH)
(5) Set up IVOL value at ALC operation start (Addr = 0DH)
(6) Set up Auto HPF. (Addr =1AH)
(7) Set up Programmable Filter ON/OFF (Addr = 1BH, 1CH, 30H)
(8) Set up Programmable Filter Path: PFSDO bit = ADCPF bit = “1” (Addr = 1DH)
(9) Set up Coefficient of Programmable Filter (Addr:1EH ~ 2FH, 32H ~ 4FH)
(10) Power Up Programmable Filter: PMPFIL bit = “0” → “1”
(11) Set Up & Power Up Digital Microphone: DMIC = PMDMR = PMDML bits = “0” → “1”
The initialization cycle time of ADC is 1059/fs=22ms@ fs=48kHz, ADRST1-0 bit = “00”. ADC
outputs “0” data during initialization cycle. After the ALC bit is set to “1”, the ALC operation starts
from IVOL value of (5).
(12) Power Down Digital Microphone: PMDMR =PMDML bits = “1” → “0”
(13) Power Down Programmable Filter: PMPFIL bit = “1” → “0”
(14) ALC Disable: ALC bit = “1” → “0”
016001936-E-00
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2016/03