AK4951AEN Datasheet, PDF (38/105 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/HP/SPK-AMP

[AK4951A]
■ Digital Microphone
1. Connection to Digital Microphones
When DMIC bit is set to “1”, the LIN1 and RIN1 pins become DMDAT (digital microphone data input) and
DMCLK (digital microphone clock supply) pins, respectively. The same voltage as AVDD must be
provided to the digital microphone. The Figure 26 and Figure 27 show stereo/mono connection examples.
The DMCLK clock is input to a digital microphone from the AK4951A. The digital microphone outputs 1bit
data, which is generated by Modulator using DMCLK clock, to the DMDAT pin. PMDML/R bits control
power up/down of the digital block (Decimation Filter and Digital Filter). (PMADL/PMADR bits settings do
not affect the digital microphone power management. Set PMMP = PMMICL/R bits to “0” when using a
digital microphone.) The DCLKE bit controls ON/OFF of the output clock from the DMCLK pin. When the
AK4951A is powered down (PDN pin= “L”), the DMCLK and DMDAT pins become floating state.
Pull-down resistors must be connected to DMCLK and DMDAT pins externally to avoid this floating state.
AVDD
AK4951A
VDD
AMP



Modulator
Lch
VDD
AMP



Modulator
DMCLK(64fs)
100k
DMDAT
R
Decimation _HPF1
Filter
PLL
Programmable
Filter
ALC
MCKI
SDTO
Rch
Figure 26. Connection Example of Stereo Digital Microphone
AVDD
AK4951A
VDD
AMP



Modulator
DMCLK(64fs)
100k
PLL
DMDAT
R
Decimation _HPF1
Filter
Programmable
Filter ^ALC
Figure 27. Connection Example of Mono Digital Microphone
MCKI
SDTO
016001936-E-00
- 38 -
2016/03