AK4951AEN Datasheet, PDF (32/105 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/HP/SPK-AMP

[AK4951A]
Table 17. BICK Output Frequency at Master Mode
BCKO bit BICK Output Frequency
0
32fs
(default)
1
64fs
■ System Reset
Upon power-up, the AK4951A must be reset by bringing the PDN pin = “L”. This reset is released when a
dummy command is input after the PDN pin = “H”. This ensures that all internal registers reset to their
initial value. Dummy command is executed by writing all “0” to the register address 00H (Figure 19). It is
recommended to set the PDN pin to “L” before power up the AK4951A.
In I²C Bus mode, the AK4951A does not return an ACK after receiving a slave address by a dummy
command as shown in Figure 19. In the actual case, initializing cycle starts by 8 SCL clocks during the
PDN pin = “H” regardless of the SDA line. Therefore, retry command is not required (Figure 20).
Executing a write or read command to the other device that is connected to the same I²C Bus also resets
the AK4951A.
S
T
A
R/W ="0"
R
T
SDA
Slave
S _Address
N ^Sub
N
A ^Address(00H) A
Data(00H)
C
C
K
K
Figure 19. Dummy Command in I²C Bus Mode
S
T
O
P
N
A
P
C
K
S
T
A
R/W
="0"
S
T
R
O
T
P
Slave
SDA ^S Address
NP
A
C
K
Figure 20. Reset Completion for example
016001936-E-00
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2016/03