AK4951AEN Datasheet, PDF (13/105 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/HP/SPK-AMP

[AK4951A]
Parameter
Min.
Typ.
Max. Unit
Mono Input: BEEP pin (PMBP bit =“1”, BPVCM bit = “0”, BPLVL3-0 bits = “0000”)
Input Resistance
46
66
86
k
Maximum Input Voltage (Note 14)
-
-
1.54 Vpp
Gain
BEEP pin → HPL, HPR pins
1
0
+1
dB
BEEP pin → SPP/SPN pins (Note 15)
SPKG1-0 bits = “00”
+4.4
+6.4
+8.4
dB
SPKG1-0 bits = “01”
-
+8.4
-
dB
SPKG1-0 bits = “10”
-
+11.1
-
dB
SPKG1-0 bits = “11”
-
+14.9
-
dB
BEEP pin → LOUT, ROUT pins
LVCM1-0 bits = “00”
-1
0
+1
dB
LVCM 1-0 bits = “01”
-
+2
-
dB
LVCM 1-0 bits = “10”
-
+2
-
dB
LVCM 1-0 bits = “11”
-
+4
-
dB
Power Supplies:
Power Up (PDN pin = “H”)
MIC + ADC + DAC + Headphone out
AVDD+DVDD+TVDD (Note 16)
-
6.5
9.8
mA
AVDD+DVDD+TVDD (Note 17)
-
5.7
-
mA
SVDD (No Load)
-
36
54
A
MIC + ADC + DAC + Speaker out
AVDD+DVDD+TVDD (Note 18)
-
5.6
8.4
mA
AVDD+DVDD+TVDD (Note 19)
-
4.7
-
mA
SVDD (No Load)
-
1.8
2.7
mA
Power Down (PDN pin = “L”) (Note 20)
AVDD+DVDD+TVDD+SVDD
-
0
10
A
SVDD (Note 21)
-
0
10
A
Note 14. The maximum value is AVDD Vpp when BPVCM bit = “1”. However, a click noise may occur
when the amplitude after BEEP-Amp is 0.5Vpp or more. (set by BPLVL3-0 bits)
Note 15. The gain is in inverse proportion to external input resistance.
Note 16. When PLL Master Mode (MCKI=12MHz), and PMADL=PMADR=PMDAC=PMPFIL=PMHPL=
PMHPR= PMVCM=PMPLL =PMBP=PMMP=M/S bits = “1”. In this case, the MPWR1 (MPWR2)
pin outputs 0mA. AVDD= 4.4mA (typ), DVDD= 2.0mA (typ), TVDD= 0.08mA (typ).
Note 17. When EXT Slave Mode (PMPLL=M/S bits =“0”), PMADL=PMADR=PMDAC=PMHPL=PMHPR=
PMVCM=PMBP=PMMP bits = “1”, and PMPFIL bit = “0”. In this case, the MPWR1 (MPWR2) pin
outputs 0mA. AVDD= 4.2mA (typ), DVDD= 1.5mA (typ), TVDD= 0.02mA (typ).
Note 18. When PLL Master Mode (MCKI=12MHz), and PMADL=PMADR=PMDAC=PMPFIL=PMSL=
PMVCM= PMPLL =PMBP=PMMP=SLPSN=DACS=M/S bits = “1”. In this case, the MPWR1
(MPWR2) pin outputs 0mA. AVDD= 3.8mA, DVDD= 1.7mA (typ), TVDD= 0.08mA (typ).
Note 19. When EXT Slave Mode (PMPLL=M/S bits =“0”), PMADL=PMADR=PMDAC=PMSL=PMVCM=
PMBP=PMMP=SLPSN=DACS bits = “1”, and PMPFIL bit = “0”. In this case, the MPWR1
(MPWR2) pin outputs 0mA. AVDD= 3.5mA, DVDD= 1.2mA (typ), TVDD= 0.02mA (typ).
Note 20. All digital input pins are fixed to TVDD or VSS2.
Note 21. When AVDD, DVDD and TVDD are powered OFF.
016001936-E-00
- 13 -
2016/03