AK4951AEN Datasheet, PDF (66/105 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/HP/SPK-AMP

[AK4951A]
[Stereo Line Output Control Sequence (SLPSN bit = “1”: in case of not using a Pop Noise Reduction
Circuit)]
LOSEL bit
SLPSN bit
PMSL bit
(1)
(2)
(3)
(8)
(7)
LOUT pin
ROUT pin
External Input
External MUTE
(4)
(5)
MUTE
Normal Operation
(4)
(6)
MUTE
Figure 47. Stereo Line Output Control Sequence
(SLPSN bit = “1”: in case of not using a Pop Noise Reduction Circuit)
(1) Set LOSEL bit = “1”. Enable stereo line output.
(2) Set SLPSN bit = “1”. Disable pop noise reduction circuit.
(3) Set PMSL bit = “1”. Stereo line output is powered-up.
LOUT and ROUT pins rise up to common voltage.
(4) Time constant is defined according to external capacitor (C) and resistor (R_L)_.
(5) Release external MUTE when the external input is stabled.
Stereo line output is enabled.
(6) Set external MUTE ON
(7) Set PMSL bit = “0”. Stereo line output is powered-down.
LOUT and ROUT pins fall down.
(8) Set LOSEL bit = “0” after wait time (≥300ms). Disable stereo line output.
■ Regulator Block
The AK4951A integrates a regulator. The 3.3V (typ) power supply voltage from the AVDD pin is converted
to 2.3V (typ) by the regulator and supplied to the analog blocks (MIC-Amp, ADC, DAC, BEEP). The
regulator is powered up by PMVCM bit = “1”, and powered down by PMVCM = “0”. Connect a 2.2µF (±
20%) capacitor to the REGFIL pin to reduce noise on AVDD.
AVDD
AK4951A
PMVCM bit = “1”: power-up
PMVCM bit = “0”: power-down
Regulator
typ 2.3V
To Analog Block
REGFIL
2.2F ± 20%
Figure 48 Regulator Block
016001936-E-00
- 66 -
2016/03