AK4951AEN Datasheet, PDF (77/105 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/HP/SPK-AMP

[AK4951A]
Addr
05H
Register Name
Mode Control 1
R/W
Default
D7
PLL3
R/W
0
D6
PLL2
R/W
1
D5
PLL1
R/W
0
D4
PLL0
R/W
1
D3
BCKO
R/W
0
D2
CKOFF
R/W
0
D1
DIF1
R/W
1
D0
DIF0
R/W
0
DIF1-0: Audio Interface Format (Table 19)
Default: “10” (MSB justified)
CKOFF: LRCK, BICK and SDTO Output Setting in Master Mode
0: LRCK, BICK and SDTO Output (default)
1: LRCK, BICK and SDTO Stop ( “L” output)
BCKO: BICK Output Frequency Setting in Master Mode (Table 10, Table 17)
0: 32fs (default)
1: 64fs
PLL3-0: PLL Reference Clock Select (Table 5)
Default: “0101” (MCKI, 12.288MHz)
Addr
06H
Register Name
Mode Control 2
R/W
Default
D7
D6
D5
CM1
CM0
0
R/W
R/W
R
0
0
0
D4
D3
D2
D1
D0
0
FS3
FS2
FS1
FS0
R
R/W
R/W
R/W
R/W
0
1
0
1
1
FS3-0: Sampling frequency Setting (Table 6, Table 8, Table 12, Table 15)
Default: “1011” (fs=48kHz)
CM1-0: MCKI Input Frequency Setting in EXT mode (Table 11, Table 14)
Default: “00” (256fs)
016001936-E-00
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2016/03