AK4951AEN Datasheet, PDF (58/105 Pages) Asahi Kasei Microsystems – 24bit Stereo CODEC with MIC/HP/SPK-AMP

[AK4951A]
Table 50. Output Digital Volume Setting
DVL7-0 bits
DVR7-0 bits
Gain
Step
00H
+12.0dB
01H
+11.5dB
02H
+11.0dB
:
:
18H
0dB
0.5dB _(default)
:
CAH
89.0dB
CBH
89.5dB
CCH~FFH Mute ( )
Table 51. Transition Time Setting of Output Digital Volume
Transition Time between
DVTM bit
DVL/R7-0 bits = 00H and CCH
Setting
fs=8kHz
fs=48kHz
0
816/fs
102ms
17.0ms
(default)
1
204/fs
25.5ms
4.3ms
■ Soft Mute
Soft mute operation is performed in the digital domain. When the SMUTE bit is set “1”, the output signal is
attenuated by -∞ (“0”) from the value (ATT DATA) set by DVL/R7-0 bits during the cycle set by DVTM bit.
When the SMUTE bit is returned to “0”, the mute is cancelled and the output attenuation gradually
changes to ATT DATA from -∞ during the cycle set by DVTM bit. If the soft mute is cancelled within the
cycle set by DVTM bit after starting the operation, the attenuation is discontinued and returned to ATT
DATA. The soft mute is effective for changing the signal source without stopping the signal transaction.
SMUTE bit
ATT DATA
(1)
Attenuation
(1)
(3)
-
Analog Output
GD
GD
(2)
Figure 40. Soft Mute Function
(1) The input signal is attenuated to  (“0”) in the cycle set by DVTM bit. When ATT DATA = +12dB
(DVL/R7-0 bits = 00H), 816/fs = 17ms@ fs=48kHz, DVTM bit= “0”.
(2) Analog output corresponding to digital input has group delay (GD).
(3) If soft mute is cancelled before attenuating to , the attenuation is discounted and returned to the
level set by DVL/R7-0 bits within the same cycle.
016001936-E-00
- 58 -
2016/03