AK4373 Datasheet, PDF (87/98 Pages) Asahi Kasei Microsystems – Low Power Stereo DAC with HP/SPK-Amp

[AK4373]
1. Grounding and Power Supply Decoupling
The AK4373 requires careful attention to power supply and grounding arrangements. AVDD, DVDD and HVDD are
usually supplied from the system’s analog supply. If AVDD, DVDD and HVDD are supplied separately, the power-up
sequence is not critical. VSS1, VSS2 and VSS3 of the AK4373 must be connected to the analog ground plane. System
analog ground and digital ground must be connected together near to where the supplies are brought onto the printed
circuit board. Decoupling capacitors must be as close to the AK4373 as possible, with the small value ceramic capacitor
being the nearest.
2. Voltage Reference
VCOM is a signal ground of this chip. A 2.2μF electrolytic capacitor in parallel with a 0.1μF ceramic capacitor attached
to the VCOM pin eliminates the effects of high frequency noise. No load current may be drawn from the VCOM pin. All
signals, especially clocks, should be kept away from the VCOM pin in order to avoid unwanted coupling into the
AK4373.
3. Analog Outputs
The input data format for the DAC is 2’s complement. The output voltage is a positive full scale for 7FFFFFH(@24bit)
and a negative full scale for 800000H(@24bit). The Line Output-Amp, Headphone-Amp and Speaker-Amp outputs are
centered at HVDD/2 when VBAT bit is “0”. (Table 40)
MS0991-E-00
- 87 -
2008/09