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AK4373 Datasheet, PDF (76/98 Pages) Asahi Kasei Microsystems – Low Power Stereo DAC with HP/SPK-Amp | |||
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[AK4373]
Addr
05H
Register Name
Mode Control 2
Default
D7
D6
D5
D4
D3
D2
D1
D0
PS1
PS0
FS3 MSBS BCKP FS2
FS1
FS0
0
0
0
0
0
0
0
0
FS3-0: Sampling Frequency Select (Table 6 and Table 7.) and MCKI Frequency Select (Table 12.)
FS3-0 bits select sampling frequency at PLL mode and MCKI frequency at EXT mode.
BCKP: BICK Polarity at DSP Mode (Table 18)
â0â: SDTO is output by the rising edge (âââ) of BICK and SDTI is latched by the falling edge (âââ). (default)
â1â: SDTO is output by the falling edge (âââ) of BICK and SDTI is latched by the rising edge (âââ).
MSBS: LRCK Polarity at DSP Mode (Table 18)
â0â: The rising edge (âââ) of LRCK is half clock of BICK before the channel change. (default)
â1â: The rising edge (âââ) of LRCK is one clock of BICK before the channel change.
PS1-0: MCKO Output Frequency Select (Table 10)
Default: â00â (256fs)
MS0991-E-00
- 76 -
2008/09
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