AK4373 Datasheet, PDF (25/98 Pages) Asahi Kasei Microsystems – Low Power Stereo DAC with HP/SPK-Amp

[AK4373]
MCKI
LRCK
BICK
1/fCLK
tCLKH
tCLKL
1/fs
tLRCKH
tLRCKL
tBCK
tBCKH
tBCKL
fMCK
VIH
VIL
VIH
VIL
Duty = tLRCKH x fs x 100
= tLRCKL x fs x 100
VIH
VIL
MCKO
50%DVDD
tMCKL
dMCK = tMCKL x fMCK x 100
Figure 15. Clock Timing (PLL Slave mode; PLL Reference Clock = MCKI pin, Except DSP mode)
tLRCKH
VIH
LRCK
VIL
tLRB
VIH
BICK
VIL
(BCKP = "0")
BICK
(BCKP = "1")
VIH
VIL
tSDS
tSDH
SDTI
VIH
MSB
VIL
Figure 16. Audio Interface Timing (PLL Slave mode, DSP mode; MSBS = “0”)
MS0991-E-00
- 25 -
2008/09