AK4373 Datasheet, PDF (86/98 Pages) Asahi Kasei Microsystems – Low Power Stereo DAC with HP/SPK-Amp

[Headphone: Pseudo cap-less mode]
Power Supply ^10u
2.2 ∼ 3.6V
Headphone
[AK4373]
Mono In
1u
Ri
Ri
25 MUTET
26 ROUT
27 LOUT
28 MIN+
29 MIN-
30 NC
31 NC
32 NC
AK4373EN
Top View
0.1u
VSS3 16
DVDD 15
BICK 14
LRCK 13
NC 12
SDTI 11
CDTI 10
CCLK 9
DSP
μP
Cp
Analog Ground Digital Ground
Notes:
- VSS1, VSS2 and VSS3 of the AK4373 must be distributed separately from the ground of external controllers.
- All digital input pins must not be left floating.
- When the AK4373 is EXT mode (PMPLL bit = “0”), a resistor and a capacitor of the VCOC pin are not needed.
- When the AK4373 is PLL mode (PMPLL bit = “1”), a resistor and a capacitor of the VCOC pin are shown in
Table 5.
- When the AK4373 is used at master mode, LRCK and BICK pins are floating before M/S bit is changed to “1”.
Therefore, 100kΩ around pull-up resistor must be connected to LRCK and BICK pins of the AK4373.
- If the Analog Mixing block is used as a single-ended, the MIN- pin must be connected to VSS1 in series with a
capacitor to avoid induced external noise.
Figure 70. Typical Connection Diagram (Pseudo cap-less mode, HPBTL bit = “0”, PSEUDO bit = “1”)
MS0991-E-00
- 86 -
2008/09