English
Language : 

AK4373 Datasheet, PDF (34/98 Pages) Asahi Kasei Microsystems – Low Power Stereo DAC with HP/SPK-Amp
[AK4373]
b) PLL reference clock: BICK or LRCK pin
Sampling frequency corresponds to 7.35kHz to 48kHz by changing FS3-0 bits (Table 7).
AK4373
MCKO
MCKI
BICK
LRCK
SDTI
DSP or μP
32fs or 64fs
1fs
BCLK
LRCK
SDTO
Figure 26. PLL Slave Mode 2 (PLL Reference Clock: BICK pin)
AK4373
MCKO
MCKI
BICK
LRCK
SDTI
≥ 32fs
1fs
DSP or μP
BCLK
LRCK
SDTO
Figure 27. PLL Slave Mode 2 (PLL Reference Clock: LRCK pin)
The external clocks (BICK and LRCK) must always be present whenever the DAC is in operation (PMDAC bit = “1”). If
these clocks are not provided, the AK4373 may draw excess current and it is not possible to operate properly because
utilizes dynamic refreshed logic internally. If the external clocks are not present, the DAC must be in the power-down
mode (PMDAC bit = “0”).
MS0991-E-00
- 34 -
2008/09