AK4373 Datasheet, PDF (65/98 Pages) Asahi Kasei Microsystems – Low Power Stereo DAC with HP/SPK-Amp

[AK4373]
<ALC Operation Example of Speaker Playback>
Register Name Comment
fs=44.1kHz
Data
Operation
LMTH1-0
Limiter detection Level
00
−2.5dBFS
ZELMN
Limiter zero crossing detection
0
Enable
ZTM1-0
Zero crossing timeout period
10
11.6ms
Recovery waiting period
WTM2-0
*WTM2-0 bits should be the same or 011
23.2ms
longer data as ZTM1-0 bits
REF7-0
Maximum gain at recovery operation C1H
+18dB
AVL7-0,
AVR7-0
Gain of AVOL
91H
0dB
LMAT1-0
Limiter ATT step
00
1 step
RGAIN1-0
Recovery GAIN step
00
1 step
ALC
ALC enable
1
Enable
Table 44. ALC Operation Example of Speaker Playback
<Caution for using Piezo Speaker>
When a piezo speaker is used, two resistances more than 20Ω should be connected between SPP/SPN pins and speaker in
series, respectively, as shown in Figure 56. Zener diodes should be inserted between speaker and GND as shown in Figure
56, in order to protect SPK-Amp of the AK4373 from the power that the piezo speaker outputs when the speaker is
pressured. Zener diodes of the following zener voltage should be used.
0.92 x HVDD ≤ Zener voltage of zener diodo (ZD in Figure 56) ≤ HVDD+0.3V
Ex) In case of HVDD = 3.8V: 3.5V ≤ ZD ≤ 4.1V
For example, zener diode which zener voltage is 3.9V (Min: 3.7V, Max: 4.1V) can be used.
SPK-Amp
ZD
≥20Ω
SPP
SPN
≥20Ω
ZD
Figure 56. Speaker Output Circuit (Load Capacitance > 30pF)
MS0991-E-00
- 65 -
2008/09