AK4373 Datasheet, PDF (54/98 Pages) Asahi Kasei Microsystems – Low Power Stereo DAC with HP/SPK-Amp

[AK4373]
■ Digital Volume at ALC Block (Manual Mode)
The digital volume at ALC block changes to a manual mode when ALC bit is “0”. This mode is used in the case shown
below.
1. After exiting reset state, set-up the registers for ALC operation (ZTM1-0, LMTH1-0 and etc)
2. When the registers for ALC operation (Limiter period, Recovery period and etc) are changed.
For example; when the change of the sampling frequency.
AVL7-0 and AVR7-0 bits set the gain of the volume control at ALC block (Table 30). The AVOL value is changed at
zero crossing or timeout. Zero crossing timeout period is set by ZTM1-0 bits.
When ALC is not used, AVL7-0 and AVR7-0 bits should be set to “91H” (0dB).
AVL7-0
AVR7-0
GAIN (dB)
Step
F1H
+36.0
F0H
+35.625
EFH
+35.25
:
:
E2H
+30.375
E1H
+30.0
0.375dB
E0H
+29.625
:
:
03H
−53.25
02H
−53.625
01H
−54
00H
MUTE
Table 30. ALC Block Digital Volume Setting
(default)
MS0991-E-00
- 54 -
2008/09