AK4373 Datasheet, PDF (67/98 Pages) Asahi Kasei Microsystems – Low Power Stereo DAC with HP/SPK-Amp

[AK4373]
■ Serial Control Interface
(1) 3-wire Serial Control Mode (I2C pin = “L”) Write Only
Internal registers may be written by using the 3-wire µP interface pins (CSN, CCLK and CDTI). The data on this interface
consists of Read/Write (Fixed to “1”), Register address (MSB first, 7bits) and Control data (MSB first, 8bits). Each bit is
clocked in on the rising edge (“↑”) of CCLK. Address and data are latched on the 16th CCLK rising edge (“↑”) after CSN
falling edge(“↓”). Clock speed of CCLK is 5MHz (max). The value of internal registers are initialized by PDN pin = “L”.
CSN
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
CCLK _{Clock, “H” or “L”}
Clock, “H” or “L”
CDTI “H” or “L”
A6 A5 R/W A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 “H” or “L”
“1”
R/W: READ/WRITE (“1”: WRITE, “0”: READ); Fixed to “1”
A6-A0: Register Address
D7-D0: Control data
Figure 58. Serial Control I/F Timing
MS0991-E-00
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2008/09