AK4373 Datasheet, PDF (20/98 Pages) Asahi Kasei Microsystems – Low Power Stereo DAC with HP/SPK-Amp

[AK4373]
Parameter
Symbol
min
typ
max
Units
Audio Interface Timing (DSP Mode)
Master Mode
LRCK “↑” to BICK “↑” (Note 33)
tDBF 0.5 x tBCK − 40 0.5 x tBCK 0.5 x tBCK + 40 ns
LRCK “↑” to BICK “↓” (Note 34)
tDBF 0.5 x tBCK − 40 0.5 x tBCK 0.5 x tBCK + 40 ns
SDTI Hold Time
tSDH
50
-
-
ns
SDTI Setup Time
tSDS
50
-
-
ns
Slave Mode
LRCK “↑” to BICK “↑” (Note 33)
tLRB 0.4 x tBCK
-
-
ns
LRCK “↑” to BICK “↓” (Note 34)
tLRB 0.4 x tBCK
-
-
ns
BICK “↑” to LRCK “↑” (Note 33)
BICK “↓” to LRCK “↑” (Note 34)
tBLR 0.4 x tBCK
-
tBLR 0.4 x tBCK
-
-
ns
-
ns
SDTI Hold Time
tSDH
50
-
-
ns
SDTI Setup Time
tSDS
50
-
Audio Interface Timing (Right/Left justified & I²S)
-
ns
Master Mode
BICK “↓” to LRCK Edge (Note 35)
tMBLR
−40
-
40
ns
SDTI Hold Time
tSDH
50
-
-
ns
SDTI Setup Time
tSDS
50
-
-
ns
Slave Mode
LRCK Edge to BICK “↑” (Note 35)
tLRB
50
-
BICK “↑” to LRCK Edge (Note 35)
tBLR
50
-
-
ns
-
ns
SDTI Hold Time
tSDH
50
-
-
ns
SDTI Setup Time
tSDS
50
-
-
ns
Note 33. MSBS, BCKP bits = “00” or “11”.
Note 34. MSBS, BCKP bits = “01” or “10”.
Note 35. BICK rising edge must not occur at the same time as LRCK edge.
MS0991-E-00
- 20 -
2008/09