AK4373 Datasheet, PDF (66/98 Pages) Asahi Kasei Microsystems – Low Power Stereo DAC with HP/SPK-Amp

[AK4373]
<Speaker-Amp Control Sequence>
Speaker-Amp is powered-up/down by PMSPK bit. When PMSPK bit is “0”, both SPP and SPN pin are in Hi-Z state.
When PMSPK bit is “1” and SPPSN bit is “0”, the Speaker-Amp enters power-save mode. In this mode, the SPP pin is
placed in Hi-Z state and the SPN pin changes to HVDD/2 voltage. Power-save mode can reduce pop noise at power-up
and power-down.
PMSPK
0
1
SPPSN
Mode
SPP
SPN
x
Power-down
VSS2
VSS2
0
Power-save
Hi-Z
HVDD/2
1
Normal Operation Normal Operation Normal Operation
Table 45. Speaker-Amp Mode Setting (x: Don’t care)
(default)
PMSPK bit
SPPSN bit
SPP pin
Hi-Z
VSS2
Hi-Z
VSS2
SPN pin
VSS2
HVDD/2
HVDD/2
>1ms
>0
Figure 57. Power-up/Power-down Timing for Speaker-Amp
VSS2
MS0991-E-00
- 66 -
2008/09